Open Source Risc-V on the Xilinx Artix-7 35T Arty – Part 2
With OpenOCD it is possible to flash/upload programs to the spi flash of the Arty Board. From there the SiFive Risc-V “core” will boot.
The JTAG wiring is shown in the “Getting Started Guide” from SiFive. For myself I have soldered a small adapter, so I do not have to connect the wires every time.
Signal Name | ARM-USBTINY-H Pin Number | Freedom E310 Arty Dev Kit JD Pin Number |
---|---|---|
VREF | 1 | 12 |
VREF | 2 | 6 |
nTRST | 3 | 2 |
TDI | 5 | 7 |
TMS | 7 | 8 |
TCK | 9 | 3 |
TDO | 13 | 1 |
GND | 14 | 5 |
nRST | 15 | 9 |
GND | 16 | 11 |
Table 1: Arty – Olimex JTAG
1 : VREF | 2 : VREF | |
3 : nTRST | 4 | |
5 : TDI | 6 | |
7 : TMS | 8 | |
NOTCH | 9 : TCK | 10 |
NOTCH | 11 | 12 |
13 : TDO | 14 : GND | |
15 : nRST | 16 : GND | |
17 | 18 | |
19 | 20 | |
L | E | D |
Table 2: Olimex JTAG
square pad | 1 : TDO | 7 : TDI |
2 : nTRST | 8 : TMS | |
3 : TCK | 9 : nRST | |
4 | 10 | |
GND | GND | GND |
VCC | VREF | VREF |
After the adapter is connected to the ARTY board, the software could be flashed.
$ cd /data2/Risc-V/freedom-e-sdk/ $ make upload BOARD=freedom-e300-arty PROGRAM=demo_gpio
Connect to the serial bus and get the output.
It is possible that the interface is different e.g. USB1
$ sudo picocom -b 115200 /dev/ttyUSB0
Output after a reset
core freq at 65000000 Hz SIFIVE, INC. 5555555555555555555555555 5555 5555 5555 5555 5555 5555 5555 5555555555555555555555 5555 555555555555555555555555 5555 5555 5555 5555 5555 5555 5555555555555555555555555555 55555 55555 555555555 55555 55555 55555 55555 55555 5 55555 55555 55555 55555 55555 55555 55555 55555 55555 55555 55555 555555555 55555 5 SiFive E-Series Software Development Kit 'demo_gpio' program. Every 2 second, the Timer Interrupt will invert the LEDs. (Arty Dev Kit Only): Press Buttons 0, 1, 2 to Set the LEDs. Pin 19 (HiFive1) or A5 (Arty Dev Kit) is being bit-banged for GPIO speed demonstration.
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